Data Structures |
struct | FAPEX_GPIO_OpenParamStrT |
| open parameters for the GPIO driver More...
|
Defines |
#define | FAPEX_GPIO_ERR_BASE (FAPEX_GPIO_MODULE_BASE + FAPEX_RET_ERR_BASE) |
#define | FAPEX_GPIO_ERR_BAD_PARAMETER (FAPEX_GPIO_ERR_BASE + FAPEX_ERR_BAD_PARAMETER) |
#define | FAPEX_GPIO_PIN_COUNT 96 |
| GPIO pin count.
|
#define | FAPEX_GPIO_PIN_MIN 0 |
| Min. GPIO pin number.
|
#define | FAPEX_GPIO_PIN_MAX (FAPEX_GPIO_PIN_COUNT-1) |
| Max. GPIO pin number.
|
#define | FAPEX_GPIO_PIN_AUTODETECT 0xFFFFFFFFUL |
| Identifier to set pin auto-detect mode during open.
|
#define | FAPEX_GPIO_OUT_OFFSET 0x0080 |
| offset for output functions
|
#define | FAPEX_GPIO_IN_OFFSET 0x0100 |
| offset for input functions
|
#define | FAPEX_GPIO_BIDI_OFFSET 0x0180 |
| offset for bidi functions
|
#define | FAPEX_GPIO_UNDEFINED 0xFF |
| undefined value
|
#define | FAPEX_GPIO_RESERVED_39 FAPEX_GPIO_UNDEFINED |
| reserved boot pin #39 (master select)
|
#define | FAPEX_GPIO_RESERVED_41 FAPEX_GPIO_UNDEFINED |
| reserved boot pin #41 (sflash boot enable)
|
#define | FAPEX_GPIO_OUT_0 (0 +FAPEX_GPIO_OUT_OFFSET) |
| Output function: value = 0.
|
#define | FAPEX_GPIO_OUT_1 (1 +FAPEX_GPIO_OUT_OFFSET) |
| Output function: value = 1.
|
#define | FAPEX_GPIO_OUT_SYSTEM_PWM (3 +FAPEX_GPIO_OUT_OFFSET) |
| Output function: System PulseWidthModulation.
|
#define | FAPEX_GPIO_OUT_FD1_CLK (4 +FAPEX_GPIO_OUT_OFFSET) |
| Output function: FractionalDivider clock.
|
#define | FAPEX_GPIO_OUT_FPC_CLK (5 +FAPEX_GPIO_OUT_OFFSET) |
| Output function: (serial) FPC clock.
|
#define | FAPEX_GPIO_OUT_FPC_DATA (6 +FAPEX_GPIO_OUT_OFFSET) |
| Output function: (serial) FPC cata.
|
#define | FAPEX_GPIO_OUT_FPC_STROBE (7 +FAPEX_GPIO_OUT_OFFSET) |
| Output function: (serial) FPC strobe.
|
#define | FAPEX_GPIO_OUT_FPC_SEG_0 (8 +FAPEX_GPIO_OUT_OFFSET) |
| Output function: (serial) FPC segment#0.
|
#define | FAPEX_GPIO_OUT_FPC_SEG_1 (9 +FAPEX_GPIO_OUT_OFFSET) |
| Output function: (serial) FPC segment#1.
|
#define | FAPEX_GPIO_OUT_FPC_SEG_2 (10+FAPEX_GPIO_OUT_OFFSET) |
| Output function: (serial) FPC segment#2.
|
#define | FAPEX_GPIO_OUT_FPC_SEG_3 (11+FAPEX_GPIO_OUT_OFFSET) |
| Output function: (serial) FPC segment#3.
|
#define | FAPEX_GPIO_OUT_AD0_DATA (12+FAPEX_GPIO_OUT_OFFSET) |
| Output function: AO data.
|
#define | FAPEX_GPIO_OUT_AD0_LRCLK (13+FAPEX_GPIO_OUT_OFFSET) |
| Output function: AO left/right clock.
|
#define | FAPEX_GPIO_OUT_AD0_BCLK (14+FAPEX_GPIO_OUT_OFFSET) |
| Output function: AO Byte clock.
|
#define | FAPEX_GPIO_OUT_AD0_CLK (15+FAPEX_GPIO_OUT_OFFSET) |
| Output function: AO clock output.
|
#define | FAPEX_GPIO_OUT_SPDIF_OUT (16+FAPEX_GPIO_OUT_OFFSET) |
| Output function: SPDIF output.
|
#define | FAPEX_GPIO_OUT_ICC1_VPEN (17+FAPEX_GPIO_OUT_OFFSET) |
| Output function: ICC#1 VP enable.
|
#define | FAPEX_GPIO_OUT_ICC1_VCC (18+FAPEX_GPIO_OUT_OFFSET) |
| Output function: ICC#1 VCC.
|
#define | FAPEX_GPIO_OUT_ICC1_RST (19+FAPEX_GPIO_OUT_OFFSET) |
| Output function: ICC#1 reset.
|
#define | FAPEX_GPIO_OUT_ICC1_DATA (20+FAPEX_GPIO_OUT_OFFSET) |
| Output function: ICC#1 data.
|
#define | FAPEX_GPIO_OUT_ICC1_CLK (21+FAPEX_GPIO_OUT_OFFSET) |
| Output function: ICC#1 clock.
|
#define | FAPEX_GPIO_OUT_UART0_RTS (22+FAPEX_GPIO_OUT_OFFSET) |
| Output function: UART0 ready-to-send.
|
#define | FAPEX_GPIO_OUT_UART0_DATA (23+FAPEX_GPIO_OUT_OFFSET) |
| Output function: UART0 transmission data.
|
#define | FAPEX_GPIO_OUT_I2C0_DATA (24+FAPEX_GPIO_OUT_OFFSET) |
| Output function: I2C data.
|
#define | FAPEX_GPIO_OUT_I2C0_CLK (25+FAPEX_GPIO_OUT_OFFSET) |
| Output function: I2C clock.
|
#define | FAPEX_GPIO_OUT_ICC0_VPEN (26+FAPEX_GPIO_OUT_OFFSET) |
| Output function: ICC#0 VP enable.
|
#define | FAPEX_GPIO_OUT_ICC0_VCC (27+FAPEX_GPIO_OUT_OFFSET) |
| Output function: ICC#0 VCC.
|
#define | FAPEX_GPIO_OUT_ICC0_RST (28+FAPEX_GPIO_OUT_OFFSET) |
| Output function: ICC#0 reset.
|
#define | FAPEX_GPIO_OUT_ICC0_DATA (29+FAPEX_GPIO_OUT_OFFSET) |
| Output function: ICC#0 data.
|
#define | FAPEX_GPIO_OUT_ICC0_CLK (30+FAPEX_GPIO_OUT_OFFSET) |
| Output function: ICC#0 clock.
|
#define | FAPEX_GPIO_OUT_CCIR_DATA_0 (31+FAPEX_GPIO_OUT_OFFSET) |
| Output function: CCIR output data bit#0.
|
#define | FAPEX_GPIO_OUT_CCIR_DATA_1 (32+FAPEX_GPIO_OUT_OFFSET) |
| Output function: CCIR output data bit#1.
|
#define | FAPEX_GPIO_OUT_CCIR_DATA_2 (33+FAPEX_GPIO_OUT_OFFSET) |
| Output function: CCIR output data bit#2.
|
#define | FAPEX_GPIO_OUT_CCIR_DATA_3 (34+FAPEX_GPIO_OUT_OFFSET) |
| Output function: CCIR output data bit#3.
|
#define | FAPEX_GPIO_OUT_CCIR_DATA_4 (35+FAPEX_GPIO_OUT_OFFSET) |
| Output function: CCIR output data bit#4.
|
#define | FAPEX_GPIO_OUT_CCIR_DATA_5 (36+FAPEX_GPIO_OUT_OFFSET) |
| Output function: CCIR output data bit#5.
|
#define | FAPEX_GPIO_OUT_CCIR_DATA_6 (37+FAPEX_GPIO_OUT_OFFSET) |
| Output function: CCIR output data bit#6.
|
#define | FAPEX_GPIO_OUT_CCIR_DATA_7 (38+FAPEX_GPIO_OUT_OFFSET) |
| Output function: CCIR output data bit#7.
|
#define | FAPEX_GPIO_OUT_CCIR_CLK (39+FAPEX_GPIO_OUT_OFFSET) |
| Output function: CCIR output clock.
|
#define | FAPEX_GPIO_OUT_CCIR_VSYNC (40+FAPEX_GPIO_OUT_OFFSET) |
| Output function: CCIR vertical sync.
|
#define | FAPEX_GPIO_OUT_CCIR_HSYNC (41+FAPEX_GPIO_OUT_OFFSET) |
| Output function: CCIR horizontal sync.
|
#define | FAPEX_GPIO_OUT_LCD_CLK (42+FAPEX_GPIO_OUT_OFFSET) |
| Output function: LCD clock.
|
#define | FAPEX_GPIO_OUT_UART1_RTS (43+FAPEX_GPIO_OUT_OFFSET) |
| Output function: UART1 RTS signal.
|
#define | FAPEX_GPIO_OUT_UART1_DATA (44+FAPEX_GPIO_OUT_OFFSET) |
| Output function: UART1 TX data.
|
#define | FAPEX_GPIO_OUT_SSP0_CLK (45+FAPEX_GPIO_OUT_OFFSET) |
| Output function: SSP clock.
|
#define | FAPEX_GPIO_OUT_SSP0_FFS (46+FAPEX_GPIO_OUT_OFFSET) |
| Output function: SSP ffs.
|
#define | FAPEX_GPIO_OUT_SSP0_OE (47+FAPEX_GPIO_OUT_OFFSET) |
| Output function: SSP oe.
|
#define | FAPEX_GPIO_OUT_SSP0_DATA (48+FAPEX_GPIO_OUT_OFFSET) |
| Output function: SSP TX data.
|
#define | FAPEX_GPIO_OUT_SFLASH_HOLD (49+FAPEX_GPIO_OUT_OFFSET) |
| Output function: SFLASH hold.
|
#define | FAPEX_GPIO_OUT_SFLASH_CS (50+FAPEX_GPIO_OUT_OFFSET) |
| Output function: SFLASH_chip select.
|
#define | FAPEX_GPIO_OUT_SFLASH_CLK (51+FAPEX_GPIO_OUT_OFFSET) |
| Output function: SFLASH_clock.
|
#define | FAPEX_GPIO_OUT_SFLASH_DATA (52+FAPEX_GPIO_OUT_OFFSET) |
| Output function: SFLASH data.
|
#define | FAPEX_GPIO_OUT_AD1_DATA (53+FAPEX_GPIO_OUT_OFFSET) |
| Output function: AO data.
|
#define | FAPEX_GPIO_OUT_AD1_LRCLK (54+FAPEX_GPIO_OUT_OFFSET) |
| Output function: AO left/right clock.
|
#define | FAPEX_GPIO_OUT_AD1_BCLK (55+FAPEX_GPIO_OUT_OFFSET) |
| Output function: AO Byte clock.
|
#define | FAPEX_GPIO_OUT_AD1_CLK (56+FAPEX_GPIO_OUT_OFFSET) |
| Output function: AO clock output.
|
#define | FAPEX_GPIO_OUT_AD2_DATA (57+FAPEX_GPIO_OUT_OFFSET) |
| Output function: AO data.
|
#define | FAPEX_GPIO_OUT_AD2_LRCLK (58+FAPEX_GPIO_OUT_OFFSET) |
| Output function: AO left/right clock.
|
#define | FAPEX_GPIO_OUT_AD2_BCLK (59+FAPEX_GPIO_OUT_OFFSET) |
| Output function: AO Byte clock.
|
#define | FAPEX_GPIO_OUT_AD2_CLK (60+FAPEX_GPIO_OUT_OFFSET) |
| Output function: AO clock output.
|
#define | FAPEX_GPIO_OUT_AD3_DATA (61+FAPEX_GPIO_OUT_OFFSET) |
| Output function: AO data.
|
#define | FAPEX_GPIO_OUT_AD3_LRCLK (62+FAPEX_GPIO_OUT_OFFSET) |
| Output function: AO left/right clock.
|
#define | FAPEX_GPIO_OUT_AD3_BCLK (63+FAPEX_GPIO_OUT_OFFSET) |
| Output function: AO Byte clock.
|
#define | FAPEX_GPIO_OUT_AD3_CLK (64+FAPEX_GPIO_OUT_OFFSET) |
| Output function: AO clock output.
|
#define | FAPEX_GPIO_OUT_I2C1_DATA (65+FAPEX_GPIO_OUT_OFFSET) |
| Output function: I2C data.
|
#define | FAPEX_GPIO_OUT_I2C1_CLK (66+FAPEX_GPIO_OUT_OFFSET) |
| Output function: I2C clock.
|
#define | FAPEX_GPIO_OUT_SSP1_CLK (67+FAPEX_GPIO_OUT_OFFSET) |
| Output function: SSP clock.
|
#define | FAPEX_GPIO_OUT_SSP1_FFS (68+FAPEX_GPIO_OUT_OFFSET) |
| Output function: SSP ffs.
|
#define | FAPEX_GPIO_OUT_SSP1_OE (69+FAPEX_GPIO_OUT_OFFSET) |
| Output function: SSP oe.
|
#define | FAPEX_GPIO_OUT_SSP1_DATA (70+FAPEX_GPIO_OUT_OFFSET) |
| Output function: SSP TX data.
|
#define | FAPEX_GPIO_OUT_TS_CLK (71+FAPEX_GPIO_OUT_OFFSET) |
| Output function: TS clock input.
|
#define | FAPEX_GPIO_OUT_TS_PSTART (72+FAPEX_GPIO_OUT_OFFSET) |
| Output function: TS packet start.
|
#define | FAPEX_GPIO_OUT_TS_EN (73+FAPEX_GPIO_OUT_OFFSET) |
| Output function: TS enable.
|
#define | FAPEX_GPIO_OUT_TS_DATA_0 (74+FAPEX_GPIO_OUT_OFFSET) |
| Output function: TS data bit#0.
|
#define | FAPEX_GPIO_OUT_TS_DATA_1 (75+FAPEX_GPIO_OUT_OFFSET) |
| Output function: TS data bit#1.
|
#define | FAPEX_GPIO_OUT_TS_DATA_2 (76+FAPEX_GPIO_OUT_OFFSET) |
| Output function: TS data bit#2.
|
#define | FAPEX_GPIO_OUT_TS_DATA_3 (77+FAPEX_GPIO_OUT_OFFSET) |
| Output function: TS data bit#3.
|
#define | FAPEX_GPIO_OUT_TS_DATA_4 (78+FAPEX_GPIO_OUT_OFFSET) |
| Output function: TS data bit#4.
|
#define | FAPEX_GPIO_OUT_TS_DATA_5 (79+FAPEX_GPIO_OUT_OFFSET) |
| Output function: TS data bit#5.
|
#define | FAPEX_GPIO_OUT_TS_DATA_6 (80+FAPEX_GPIO_OUT_OFFSET) |
| Output function: TS data bit#6.
|
#define | FAPEX_GPIO_OUT_TS_DATA_7 (81+FAPEX_GPIO_OUT_OFFSET) |
| Output function: TS data bit#7.
|
#define | FAPEX_GPIO_OUT_HD_DE (82+FAPEX_GPIO_OUT_OFFSET) |
| Output function: HD DE.
|
#define | FAPEX_GPIO_OUT_HD_VSYNC (83+FAPEX_GPIO_OUT_OFFSET) |
| Output function: HD VSYNC.
|
#define | FAPEX_GPIO_OUT_HD_HSYNC (84+FAPEX_GPIO_OUT_OFFSET) |
| Output function: HD HSYNC.
|
#define | FAPEX_GPIO_OUT_FD3_CLK (85+FAPEX_GPIO_OUT_OFFSET) |
| Output function: FD3 CLK.
|
#define | FAPEX_GPIO_OUT_UPI_ADDRX0 (86+FAPEX_GPIO_OUT_OFFSET) |
| Output function: UPI ADDRX0.
|
#define | FAPEX_GPIO_OUT_UPI_ADDRX1 (87+FAPEX_GPIO_OUT_OFFSET) |
| Output function: UPI ADDRX1.
|
#define | FAPEX_GPIO_OUT_UPI_ADDRX2 (88+FAPEX_GPIO_OUT_OFFSET) |
| Output function: UPI ADDRX2.
|
#define | FAPEX_GPIO_OUT_UPI_ADDRX3 (89+FAPEX_GPIO_OUT_OFFSET) |
| Output function: UPI ADDRX3.
|
#define | FAPEX_GPIO_IN_SSP0_DATA (1 +FAPEX_GPIO_IN_OFFSET) |
| Input function: SFLASH data input.
|
#define | FAPEX_GPIO_IN_SFLASH_DATA (2 +FAPEX_GPIO_IN_OFFSET) |
| Input function: SFLASH data input.
|
#define | FAPEX_GPIO_IN_CCIR_DATA_0 (3 +FAPEX_GPIO_IN_OFFSET) |
| Input function: CCIR input data bit#0.
|
#define | FAPEX_GPIO_IN_CCIR_DATA_1 (4 +FAPEX_GPIO_IN_OFFSET) |
| Input function: CCIR input data bit#1.
|
#define | FAPEX_GPIO_IN_CCIR_DATA_2 (5 +FAPEX_GPIO_IN_OFFSET) |
| Input function: CCIR input data bit#2.
|
#define | FAPEX_GPIO_IN_CCIR_DATA_3 (6 +FAPEX_GPIO_IN_OFFSET) |
| Input function: CCIR input data bit#3.
|
#define | FAPEX_GPIO_IN_CCIR_DATA_4 (7 +FAPEX_GPIO_IN_OFFSET) |
| Input function: CCIR input data bit#4.
|
#define | FAPEX_GPIO_IN_CCIR_DATA_5 (8 +FAPEX_GPIO_IN_OFFSET) |
| Input function: CCIR input data bit#5.
|
#define | FAPEX_GPIO_IN_CCIR_DATA_6 (9 +FAPEX_GPIO_IN_OFFSET) |
| Input function: CCIR input data bit#6.
|
#define | FAPEX_GPIO_IN_CCIR_DATA_7 (10+FAPEX_GPIO_IN_OFFSET) |
| Input function: CCIR input data bit#7.
|
#define | FAPEX_GPIO_IN_CCIR_CLK (11+FAPEX_GPIO_IN_OFFSET) |
| Input function: CCIR input CLOCK.
|
#define | FAPEX_GPIO_IN_CCIR_EXT_EN (12+FAPEX_GPIO_IN_OFFSET) |
| Input function: CCIR enable external CCIR input.
|
#define | FAPEX_GPIO_IN_IR_DATA (13+FAPEX_GPIO_IN_OFFSET) |
| Input function: IR input data.
|
#define | FAPEX_GPIO_IN_I2C0_DATA (14+FAPEX_GPIO_IN_OFFSET) |
| Input function: I2C data.
|
#define | FAPEX_GPIO_IN_I2C0_CLK (15+FAPEX_GPIO_IN_OFFSET) |
| Input function: I2C clock.
|
#define | FAPEX_GPIO_IN_ICC1_DATA (16+FAPEX_GPIO_IN_OFFSET) |
| Input function: ICC#1 data.
|
#define | FAPEX_GPIO_IN_ICC1_IN (17+FAPEX_GPIO_IN_OFFSET) |
| Input function: ICC#1 card detection.
|
#define | FAPEX_GPIO_IN_ICC0_DATA (18+FAPEX_GPIO_IN_OFFSET) |
| Input function: ICC#0 data.
|
#define | FAPEX_GPIO_IN_ICC0_IN (19+FAPEX_GPIO_IN_OFFSET) |
| Input function: ICC#0 card detection.
|
#define | FAPEX_GPIO_IN_UART0_CTS (20+FAPEX_GPIO_IN_OFFSET) |
| Input function: UART0 CTS signal.
|
#define | FAPEX_GPIO_IN_UART0_DATA (21+FAPEX_GPIO_IN_OFFSET) |
| Input function: UART0 RX data.
|
#define | FAPEX_GPIO_IN_SSP1_DATA (22+FAPEX_GPIO_IN_OFFSET) |
| Input function: SFLASH data input.
|
#define | FAPEX_GPIO_IN_TS_C_CLK (23+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS C clock input.
|
#define | FAPEX_GPIO_IN_TS_C_PSTART (24+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS C packet start.
|
#define | FAPEX_GPIO_IN_TS_C_EN (25+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS C enable.
|
#define | FAPEX_GPIO_IN_TS_C_DATA_0 (26+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS C data bit#0.
|
#define | FAPEX_GPIO_IN_TS_C_DATA_1 (27+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS C data bit#1.
|
#define | FAPEX_GPIO_IN_TS_C_DATA_2 (28+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS C data bit#2.
|
#define | FAPEX_GPIO_IN_TS_C_DATA_3 (29+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS C data bit#3.
|
#define | FAPEX_GPIO_IN_TS_C_DATA_4 (30+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS C data bit#4.
|
#define | FAPEX_GPIO_IN_TS_C_DATA_5 (31+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS C data bit#5.
|
#define | FAPEX_GPIO_IN_TS_C_DATA_6 (32+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS C data bit#6.
|
#define | FAPEX_GPIO_IN_TS_C_DATA_7 (33+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS C data bit#7.
|
#define | FAPEX_GPIO_IN_TS_B_CLK (34+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS B clock input.
|
#define | FAPEX_GPIO_IN_TS_B_PSTART (35+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS B packet start.
|
#define | FAPEX_GPIO_IN_TS_B_EN (36+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS B enable.
|
#define | FAPEX_GPIO_IN_TS_B_DATA_0 (37+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS B data bit#0.
|
#define | FAPEX_GPIO_IN_TS_B_DATA_1 (38+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS B data bit#1.
|
#define | FAPEX_GPIO_IN_TS_B_DATA_2 (39+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS B data bit#2.
|
#define | FAPEX_GPIO_IN_TS_B_DATA_3 (40+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS B data bit#3.
|
#define | FAPEX_GPIO_IN_TS_B_DATA_4 (41+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS B data bit#4.
|
#define | FAPEX_GPIO_IN_TS_B_DATA_5 (42+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS B data bit#5.
|
#define | FAPEX_GPIO_IN_TS_B_DATA_6 (43+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS B data bit#6.
|
#define | FAPEX_GPIO_IN_TS_B_DATA_7 (44+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS B data bit#7.
|
#define | FAPEX_GPIO_IN_TS_A_CLK (45+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS A clock input.
|
#define | FAPEX_GPIO_IN_TS_A_PSTART (46+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS A packet start.
|
#define | FAPEX_GPIO_IN_TS_A_EN (47+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS A enable.
|
#define | FAPEX_GPIO_IN_TS_A_DATA_0 (48+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS A data bit#0.
|
#define | FAPEX_GPIO_IN_TS_A_DATA_1 (49+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS A data bit#1.
|
#define | FAPEX_GPIO_IN_TS_A_DATA_2 (50+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS A data bit#2.
|
#define | FAPEX_GPIO_IN_TS_A_DATA_3 (51+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS A data bit#3.
|
#define | FAPEX_GPIO_IN_TS_A_DATA_4 (52+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS A data bit#4.
|
#define | FAPEX_GPIO_IN_TS_A_DATA_5 (53+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS A data bit#5.
|
#define | FAPEX_GPIO_IN_TS_A_DATA_6 (54+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS A data bit#6.
|
#define | FAPEX_GPIO_IN_TS_A_DATA_7 (55+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS A data bit#7.
|
#define | FAPEX_GPIO_IN_IRQ_IN0 (56+FAPEX_GPIO_IN_OFFSET) |
| Input function: TS A data bit#7.
|
#define | FAPEX_GPIO_IN_EXT_AO_DATA (57+FAPEX_GPIO_IN_OFFSET) |
| Input function: external AO data.
|
#define | FAPEX_GPIO_IN_EXT_AO_LRCLK (58+FAPEX_GPIO_IN_OFFSET) |
| Input function: external AO left/right clock.
|
#define | FAPEX_GPIO_IN_EXT_AO_BCLK (59+FAPEX_GPIO_IN_OFFSET) |
| Input function: external AO byte clock.
|
#define | FAPEX_GPIO_IN_FPC_KEY_0 (60+FAPEX_GPIO_IN_OFFSET) |
| Input function: (serial) FPC key#0.
|
#define | FAPEX_GPIO_IN_FPC_KEY_1 (61+FAPEX_GPIO_IN_OFFSET) |
| Input function: (serial) FPC key#1.
|
#define | FAPEX_GPIO_IN_LCD_CLK (62+FAPEX_GPIO_IN_OFFSET) |
| Input function: (serial) FPC key#1.
|
#define | FAPEX_GPIO_IN_UART1_CTS (63+FAPEX_GPIO_IN_OFFSET) |
| Input function: UART1 CTS signal.
|
#define | FAPEX_GPIO_IN_UART1_DATA (64+FAPEX_GPIO_IN_OFFSET) |
| Input function: UART1 RX data.
|
#define | FAPEX_GPIO_IN_I2C1_DATA (65+FAPEX_GPIO_IN_OFFSET) |
| Input function: I2C data.
|
#define | FAPEX_GPIO_IN_I2C1_CLK (66+FAPEX_GPIO_IN_OFFSET) |
| Input function: I2C clock.
|
#define | FAPEX_GPIO_IN_GPIO_IRQ (67+FAPEX_GPIO_IN_OFFSET) |
| Input function: I2C clock.
|
#define | FAPEX_GPIO_BIDI_I2C0_DATA ((FAPEX_GPIO_OUT_I2C0_DATA<<16)+FAPEX_GPIO_IN_I2C0_DATA) |
| In/Out function: I2C data.
|
#define | FAPEX_GPIO_BIDI_I2C0_CLK ((FAPEX_GPIO_OUT_I2C0_CLK<<16)+FAPEX_GPIO_IN_I2C0_CLK) |
| In/Out function: I2C clock.
|
#define | FAPEX_GPIO_BIDI_ICC1_DATA ((FAPEX_GPIO_OUT_ICC1_DATA<<16)+FAPEX_GPIO_IN_ICC1_DATA) |
| In/Out function: ICC#1 data.
|
#define | FAPEX_GPIO_BIDI_ICC0_DATA ((FAPEX_GPIO_OUT_ICC0_DATA<<16)+FAPEX_GPIO_IN_ICC0_DATA) |
| In/Out function: ICC#0 data.
|
#define | FAPEX_GPIO_BIDI_I2C1_DATA ((FAPEX_GPIO_OUT_I2C1_DATA<<16)+FAPEX_GPIO_IN_I2C1_DATA) |
| In/Out function: I2C data.
|
#define | FAPEX_GPIO_BIDI_I2C1_CLK ((FAPEX_GPIO_OUT_I2C1_CLK<<16)+FAPEX_GPIO_IN_I2C1_CLK) |
| In/Out function: I2C clock.
|
#define | FAPEX_GPIO_BIDI_GENERIC_SW_FUNCTION ((FAPEX_GPIO_OUT_1<<16)+0) |
| A generic bidi SW function.
|
#define | FAPEX_GPIO_IN_GENERIC_SW_FUNCTION ((FAPEX_GPIO_OUT_1<<16)+0) |
| A generic input SW function.
|
#define | FAPEX_GPIO_OUT_MIN FAPEX_GPIO_OUT_0 |
| index of first output function
|
#define | FAPEX_GPIO_OUT_MAX FAPEX_GPIO_OUT_UPI_ADDRX3 |
| index of last output function
|
#define | FAPEX_GPIO_IN_MIN FAPEX_GPIO_IN_SSP0_DATA |
| index of first input function
|
#define | FAPEX_GPIO_IN_MAX FAPEX_GPIO_IN_I2C1_CLK |
| index of last input function
|
#define | FAPEX_GPIO_BIDI_MIN FAPEX_GPIO_BIDI_ICC1_DATA |
| index of first in-out function
|
#define | FAPEX_GPIO_BIDI_MAX FAPEX_GPIO_BIDI_I2C1_CLK |
| index of last in-out function
|
#define | FAPEX_IOCCOM_GPIO_OPEN _IOW(FAPEX_DEV_TYPE, FAPEX_IOCCOM_NB_GPIO + 0, FAPEX_GPIO_OpenParamStrT) |
| ioctl specific command for the GPIO driver
|
#define | FAPEX_IOCCOM_GPIO_READBIT _IOR(FAPEX_DEV_TYPE, FAPEX_IOCCOM_NB_GPIO + 1, int32_t) |
#define | FAPEX_IOCCOM_GPIO_WRITEBIT _IOW(FAPEX_DEV_TYPE, FAPEX_IOCCOM_NB_GPIO + 1, int32_t) |
Functions |
FAPEXOPENRET_T | FAPEX_GPIO_Open (FAPEXOPENARG1_T id, FAPEXOPENARG2_T flags, FAPEXOPENARG3_T argptr) |
| open method. This function is called with the systemcall "open".
|
FAPEXRELRET_T | FAPEX_GPIO_Close (FAPEXRELARG1_T id) |
| release method. This function is called with the systemcall "close".
|
FAPEXIOCRET_T | FAPEX_GPIO_Ioctl (FAPEXIOCARG1_T id, FAPEXIOCARG2_T cmd, FAPEXIOCARG3_T pArg) |
| ioctl method. This function is called with the systemcall "ioctl".
|
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